23#include "nimble/nimble/include/nimble/hci_common.h"
33#define BLE_PHY_NUM_CHANS (40)
34#define BLE_PHY_NUM_DATA_CHANS (37)
35#define BLE_PHY_CHAN0_FREQ_MHZ (2402)
36#define BLE_PHY_DATA_CHAN0_FREQ_MHZ (2404)
37#define BLE_PHY_CHAN_SPACING_MHZ (2)
38#define BLE_PHY_NUM_ADV_CHANS (3)
39#define BLE_PHY_ADV_CHAN_START (37)
42#define BLE_PHY_MAX_PWR_DBM (10)
45#define BLE_PHY_DEV_KHZ (185)
46#define BLE_PHY_BINARY_ZERO (-BLE_PHY_DEV)
47#define BLE_PHY_BINARY_ONE (BLE_PHY_DEV)
50#define BLE_PHY_MAX_DRIFT_PPM (50)
53#define BLE_PHY_BIT_RATE_BPS (1000000)
56#define BLE_IS_ADV_CHAN(chan) (chan >= BLE_PHY_ADV_CHAN_START)
57#define BLE_IS_DATA_CHAN(chan) (chan < BLE_PHY_ADV_CHAN_START)
60#define BLE_PHY_STATE_IDLE (0)
61#define BLE_PHY_STATE_RX (1)
62#define BLE_PHY_STATE_TX (2)
65#define BLE_PHY_TRANSITION_NONE (0)
66#define BLE_PHY_TRANSITION_RX_TX (1)
67#define BLE_PHY_TRANSITION_TX_RX (2)
70#define BLE_PHY_ERR_RADIO_STATE (1)
71#define BLE_PHY_ERR_INIT (2)
72#define BLE_PHY_ERR_INV_PARAM (3)
73#define BLE_PHY_ERR_NO_BUFS (4)
74#define BLE_PHY_ERR_TX_LATE (5)
75#define BLE_PHY_ERR_RX_LATE (6)
78#define BLE_PHY_MAX_PDU_LEN (257)
81typedef void (*ble_phy_tx_end_func)(
void *arg);
84int ble_phy_init(
void);
87int ble_phy_setchan(uint8_t chan, uint32_t access_addr, uint32_t crcinit);
90int ble_phy_tx_set_start_time(uint32_t cputime, uint8_t rem_usecs);
93int ble_phy_rx_set_start_time(uint32_t cputime, uint8_t rem_usecs);
96void ble_phy_set_txend_cb(ble_phy_tx_end_func txend_cb,
void *arg);
98typedef uint8_t (*ble_phy_tx_pducb_t)(uint8_t *dptr,
void *pducb_arg,
102int ble_phy_tx(ble_phy_tx_pducb_t pducb,
void *pducb_arg, uint8_t end_trans);
108void ble_phy_rxpdu_copy(uint8_t *dptr,
struct os_mbuf *rxpdu);
111int ble_phy_txpwr_set(
int dbm);
114int ble_phy_txpower_round(
int dbm);
117int ble_phy_txpwr_get(
void);
120void ble_phy_set_rx_pwr_compensation(int8_t compensation);
123void ble_phy_disable(
void);
125#define BLE_PHY_WFR_ENABLE_RX (0)
126#define BLE_PHY_WFR_ENABLE_TXRX (1)
128void ble_phy_wfr_enable(
int txrx, uint8_t tx_phy_mode, uint32_t wfr_usecs);
131void ble_phy_rfclk_enable(
void);
134void ble_phy_rfclk_disable(
void);
140void ble_phy_restart_rx(
void);
143int ble_phy_state_get(
void);
146uint8_t ble_phy_xcvr_state_get(
void);
149int ble_phy_rx_started(
void);
157uint8_t ble_phy_max_data_pdu_pyld(
void);
160uint32_t ble_phy_access_addr_get(
void);
163void ble_phy_encrypt_enable(uint64_t pkt_counter, uint8_t *iv, uint8_t *key,
167void ble_phy_encrypt_disable(
void);
170void ble_phy_encrypt_set_pkt_cntr(uint64_t pkt_counter,
int dir);
173void ble_phy_resolv_list_enable(
void);
176void ble_phy_resolv_list_disable(
void);
184#define BLE_PHY_MODE_CODED_500KBPS (0)
185#define BLE_PHY_MODE_1M (1)
186#define BLE_PHY_MODE_2M (2)
187#define BLE_PHY_MODE_CODED_125KBPS (3)
190#define BLE_PHY_NUM_MODE (4)
193#define BLE_PHY_1M (BLE_HCI_LE_PHY_1M)
194#define BLE_PHY_2M (BLE_HCI_LE_PHY_2M)
195#define BLE_PHY_CODED (BLE_HCI_LE_PHY_CODED)
198#define BLE_PHY_MASK_1M (BLE_HCI_LE_PHY_1M_PREF_MASK)
199#define BLE_PHY_MASK_2M (BLE_HCI_LE_PHY_2M_PREF_MASK)
200#define BLE_PHY_MASK_CODED (BLE_HCI_LE_PHY_CODED_PREF_MASK)
203#define BLE_PHY_IDX_1M (0)
204#define BLE_PHY_IDX_2M (1)
205#define BLE_PHY_IDX_CODED (2)
207#if (MYNEWT_VAL(BLE_LL_CFG_FEAT_LE_2M_PHY) || MYNEWT_VAL(BLE_LL_CFG_FEAT_LE_CODED_PHY))
208uint32_t ble_phy_mode_pdu_start_off(
int phy);
209void ble_phy_mode_set(uint8_t tx_phy_mode, uint8_t rx_phy_mode);
211#define ble_phy_mode_pdu_start_off(phy) (40)
215int ble_phy_get_cur_phy(
void);
216static inline int ble_ll_phy_to_phy_mode(
int phy,
int phy_options)
226#if MYNEWT_VAL(BLE_LL_CFG_FEAT_LE_CODED_PHY)
227 if (phy == BLE_PHY_CODED && phy_options == BLE_HCI_LE_PHY_CODED_S2_PREF) {
228 phy_mode = BLE_PHY_MODE_CODED_500KBPS;
237#if MYNEWT_VAL(BLE_LL_DTM)
238void ble_phy_enable_dtm(
void);
239void ble_phy_disable_dtm(
void);